IEEE

Venus: A RISC-V Domain Specific Architecture Towards Integrated AI and Wireless Baseband Processing for 6G Edge Intelligence

Abstract: Future 6G local area networks (LANs) are expected to inherently feature edge artificial intelligence (AI) capabilities, despite constraints on power consumption and device dimensions.
GitHub

SGDH-RVSoC Project, a portable and Linux capable RISC-V computer system on an FPGA

The RVSoC Project was the origin, serving as a research and development project of the RISC-V computer system targeting FPGAs in Verilog HDL at Arch Lab, Tokyo Tech. Building on this foundation, we ...
elektormagazine

Call for Presentations for Online Conference: RISC-V – Open Architecture for Embedded, AI, and Automotive

The organizers at Elektor are seeking presentations for the online conference on RISC-V on April 15, 2026. The call for presentations is open until January 16. On April 15, 2026, Elektor is hosting an ...
IEEE

Delta-NAS: Difference of Architecture Encoding for Predictor-Based Evolutionary Neural Architecture Search

Abstract: Neural Architecture Search (NAS) continues to serve a key roll in the design and development of neural networks for task specific deployment. Modern NAS techniques struggle to deal with ever ...