EDN

Building an FPGA FIFO without using logic resources

Today, FPGA designers are using these flexible devices to perform everything from simple glue logic tasks to implementing complicated system on a chip (SoC) functions. The efficiency and ease of ...
CU Boulder News & Events

ECEA 5360 Introduction to FPGA Design for Embedded Systems

This course will give you the foundation for FPGA design in Embedded Systems. You will learn what an FPGA is and how this technology was developed, how to select the best FPGA architecture for a given ...
Design-Reuse

FPGA Coprocessors: Hardware IP for Software Engineers

The concept and application of FPGA Coprocessors as a means of delivering hardware IP to software and system engineers is presented. The hardware and software architecture of FPGA coprocessors is ...
Electronic Design

1.5-GHz FPGA Takes Clock Gating To The Max

Flexibility is key to FPGA success, but speed is equally important. Achronix almost triples the throughput of the system by taking clock gating to the extreme. The Achronix Speedster FPGAs use a ...
Electronic Design

First-Time FPGA Success Requires Exhaustive Examination of Clock Domain Crossings

Clock domain crossings are significant sources of field system failures. Despite this fact, designs continue to be released without fully verified CDCs. A false sense of security resulting from ...
EDN

Debug a microcontroller-to-FPGA interface from the FPGA side

Microcontrollers and FPGAs often work together in embedded systems. As more functions move into the FPGA, however, debugging the interface between the two devices becomes more difficult. The ...
Electronics Weekly

IDT expands dual-port, FIFO families

Supporting the evolving bandwidth needs of the next-generation wireless and networking infrastructure, IDT has added devices to its multi-port and first-in/first-out (FIFO) families. The 36Mbit ...